DragonFly BSD
DragonFly users List (threaded) for 2005-04
[Date Prev][Date Next]  [Thread Prev][Thread Next]  [Date Index][Thread Index]

Re: boot loader question

From: Bill Hacker <wbh@xxxxxxxxxxxxx>
Date: Tue, 05 Apr 2005 05:22:49 +0800

Joerg Sonnenberger wrote:

On Tue, Apr 05, 2005 at 04:30:47AM +0800, Bill Hacker wrote:

PCMCIA/Cardbus at least presents itself 'honestly' - take a CF formatted as a FAT HDD.
- looks like any other IDE/ATAPI device to the OS, as it should - that's what the hardware bus *is*.

I disagree here. ATAPI is nothing but a special wrapping for SCSI-3 (?)

A subset only.

The same holds for USB mass storage or SBP. The only difference
is that ATAPI and SBP got it mostly right and USB mass storage not.

Which is where we came in.... 'mostly not' has surely not been any better-served
by USB ID'ing *as* SCSI, which has historically been very good at adaptive configuration (negotiation) to accommodate a mix of newer and legacy gear.

I'm not talking about the actual physical package here, but the protocol
going over the wire. The physical wrapping can be exchanged with a good

Well.... 'good (hardware) design' can compensate for a lot, but 'locking in' to bad choices seems to be required by Sod's Law somewhere.

My point is that it is better to not have to ask for either code or hardware band-aids when a cleaner design would do.

IBM's misuse of the Intel 8259 PIC, long-since embedded in {whatever}bridge chips, may be the most enduring such case.

On S-100 boards and early IBM PC1, each 8259 PIC lived in a single large 24-pin DIP package, designed to have two separate means of expansion or 'cascading'.

IBM chose the '8 *plus* 8 -1' route, joining the IRQ 2 and IRQ 9 pins together, and leaving us with a miserable few
IRQ's (several being hard-wired to the system). No one would ever need any more IRQ's, right?

For the same chip count and package they could have used Intel's built-in 8 *times* 8 option,
giving us 64-max IRQ's all these years instead. Upshot? More expensive software to
discover what device, and where, really raised a given IRQ, and who did it first - look at PCI's INT complexity.

Time and bus-cycles wasted, still yet today, over a legacy saving of a few hardware connections that nowadays would be
just a couple extra nano-channels in the same microscopic area of the chip.

Too late to change that now, but it sure has cost us .....



[Date Prev][Date Next]  [Thread Prev][Thread Next]  [Date Index][Thread Index]