DragonFly kernel List (threaded) for 2006-09
Re: Cache coherency, clustering, and Kernel virtualization
Thomas E. Spanjaard wrote:
This is hardly the logical step forward beyond SMP, and does nothing to
make proper use of consumer-level NUMA equipment (AMDs Athlon64/Opteron
family of processors for example), I don't see multiple virtual kernels
work in a NUMA system. Or do you intend to not neglect this class of
Let us not forget that what Matt has proposed to do is not the be-all-and
end-all of DFLY. Wasn't really even the core part of the 'Prime Directive'.
The reverse, actually. A side-trip, using a byproduct of the accomplishments
to-date of the core work focused on clustering and 'portability' of resources
and running code.
NUMA, and the AMD instructions set, as well as Intel's sudden rush of brains to
the anatomy with Vanderpool, are not yet where IBM's mainframe-class CPU have
been for a very long time. I'm not talking about speed or cost, or even
elegance of the instructions set or pipeline - or any of that.
Simply that these chunks of IBM transmetals have *hardware* as well as
instruction-set and 'mode' mechanisms to make it easier for them to export or
virtualize themselves well.
That remains a side-issue for now, and maybe forever, w/r DFLY.
I am sure that in time, DFLY will run on whatever architecture is widely
available and well-supported. 'Supported' meaning by F/OSS in general and right
here in specific, not just in IBM, Intel, or AMD Research parks.
I've believed for some time that a *BSD could make a far better hypervisor than
Linux, and DFLY perhaps the best of all, so I am *delighted* to see Matt choose
to pursue that - even if only as a better demo / devel tool.
JM2CW, but Virtualization and hypervisor capability are of far more utility to
me, here and now, than clustering is likely to be ... ever.