DragonFly submit List (threaded) for 2006-08
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Re: nfe(4) for nVidia GigE
: I found one problem, but I don't know if it will fix the TX watchdog
: timeouts.
:
: nfe_encap() is totally broken. It is setting each ring segment to
: NFE_TX_VALID as it goes, before it finishes writing out all the segments.
: In fact, it seems to be setting NFE_TX_VALID before it sets the LASTFRAG
: flag! It's amazing that it works at all.
:
: I am going to try to fix it.
Ok, there are two issues. The first issue is that NFE_TX_VALID is
being set too early in nfe_encap(). The second issue I found from
browsing OpenBSD/NetBSD postings on the subject. It appears that
sometimes the device simply does not generate an interrupt on TX
completion. Nobody seems to know why.
I have put the updated NFE driver code here. There are two changes.
First, I fix the NFE_TX_VALID issue. Second, I poll for transmit
completion in the watchdog timeout and don't reset the interface if
it finds transmit packets to retire.
fetch http://apollo.backplane.com/DFlyMisc/if_nfe01.tgz
Sephe, please integrate both tiem with your serializer changes. The
above archive is based on my original modified driver, not the one
where you fixed the jumbo packet serialization.
--
Also for some reason the NFE interface interferes with my 3ware card
(twa). Both are on IRQ 10. Both work most of the time, but sometimes
the NFE interface causes an interrupt from the 3ware to be lost. I
have no idea why this happens but I'm guessing it is motherboard related.
Turning on emergency interrupt polling (kern.emergency_intr_enable)
and leaving the emergency polling frequency at 10hz seems to solve
that problem. It's a terrible hack but it works.
-Matt
Matthew Dillon
<dillon@xxxxxxxxxxxxx>
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