DragonFly commits List (threaded) for 2009-04
DragonFly BSD
DragonFly commits List (threaded) for 2009-04
[Date Prev][Date Next]  [Thread Prev][Thread Next]  [Date Index][Thread Index]

Re: DragonFly-2.3.0.828.gd7215 master sys/dev/netif/emx if_emx.h


From: Matthew Dillon <dillon@xxxxxxxxxxxxxxxxxxxx>
Date: Wed, 29 Apr 2009 09:42:01 -0700 (PDT)

:Mmm, setting __cachealign on struct field (i.e. in emx_softc) does not
:achieve what I want here: I want the struct's size to be (N *
:cacheline_size) in addition to be cacheline_size aligned.  So in
:ifpoll, CPU0's writing to rx_data[0] will not pollute rx_data[1]'s
:cache in CPU1.
:
:Best Regards,
:sephe

    Ah, I see.  Yes, that makes sense.  In the old days we would
    accomplish that by explicitly padding the structure, or creating
    an enclosing structure with the pad to declare the array as.

    In anycase, I guess __cachealign is fine.  I just hate using that
    GCC extension, it is so non-standard.

					-Matt
					Matthew Dillon 
					<dillon@backplane.com>



[Date Prev][Date Next]  [Thread Prev][Thread Next]  [Date Index][Thread Index]