DragonFly commits List (threaded) for 2007-07
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DragonFly commits List (threaded) for 2007-07
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Re: cvs commit: src/sys/kern kern_spinlock.c src/sys/platform/vkernel/i386 cpu_regs.c src/sys/sys systm.h src/sys/platform/pc32/i386 machdep.c

From: "Simon 'corecode' Schubert" <corecode@xxxxxxxxxxxx>
Date: Mon, 02 Jul 2007 23:07:39 +0200

Michal Belczyk wrote:
On Mon, Jul 02, 2007 at 07:06:21PM +0200, Simon 'corecode' Schubert wrote:
Matthew Dillon wrote:
  Implement an architecture call for contended spinlocks so the vkernel can
  insert a usleep().
Very nice. I've been meaning to do this. We could use monitor/mwait on core2duo CPUs for power reduction for example (also when waiting for the mplock/scheduler changes in the idle loop).

On my core2duo laptop replacing cpu_idle_hook() with one using mwait to enter enhanced halt states resulted in lowering the maximal cpu temperature from above 60 to below 55 degrees and made the cpu fan run less often. I even made some graphs representing the cpu temperature in time[1] on an idle system.

Wow. Then I must have missunderstood the Intel docs. I thought "hlt" was as low as it can get, now you tell me hlt is less efficient than mwait? We definitely need that. However, we need some way to dynamically use one or the other system, depending on CPU features. Binary runtime patching comes to my mind...

However, I believe that lowering cpu voltage and frequency via EST and estd
should give better results.  Some time ago I wrote a kernel module
implementing EST for those cpus[2] in an ACPI-independent way.

How does this differ from the common way of doing EST (writing to the MSRS)?

Nice thing is
that one can set voltage and frequency idependently of each other, at least on
my cpu ;-)  And it was working with estd.

This actually worked (more as a bug) with the est module as well (always operating on the current core). However, I could not see any benefit setting a lower frequency/voltage: The CPU would run slower, but the fan would turn on equally often.

Now it's probably non-compilable
after some SYSINIT-related macros had been renamed.
Note that it's based only on intel docs and my own experiments so there might
be bugs in it.

It would be really awesome if you maybe could find the time to integrate this into the sources and submit a patch, as you have already considerable experience. Do you think this might be possible?


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