Re: cvs commit: src/sys/amd64/include segments.h src/sys/bus/pci pci.c pci_compat.c src/sys/bus/pci/i386 pci_cfgreg.c src/sys/i386/apic apic_ipl.h apic_ipl.s apic_vector.s mpapic.c mpapic.h src/sys/i386/conf GENERIC src/sys/i386/i386 autoconf.c globals.s ...

[Matthew Dillon <dillon@xxxxxxxxxxxxxxxxxxxx>]

:dillon      2005/11/04 00:57:31 PST
:
:  Allow 'options SMP' *WITHOUT* 'options APIC_IO'.  That is, an ability to
:  produce an SMP-capable kernel that uses the PIC/ICU instead of the IO APICs
:  for interrupt routing.

    This was the only way I could get my Shuttle XPC (with an AMD X2 in
    it) to route interrupts properly with SMP enabled.

    My conclusion is, amoung other things, that the BIOS is broken, even 
    after flashing the latest version.  For example the mptable tries to
    route to non-existant IO APIC pins (pins numbers > 23).   ACPI will
    probably work better but I don't have it's interrupt routing working
    yet.

    Unfortunately the XPC is still not 100%.  The motherboard ethernet 
    (the infamous NV device) still has serious device timeout problems.
    In fact, just a moment ago it got into a state that neither a reboot
    or a soft power down would recover from.  I had to physically pull
    the plug.  At least I know it isn't my fault since the same timeout
    problem with this device effects other projects as well.

    But most everything else works, and that is progress!  I'll just have 
    to buy an Intel GigE card for the PCI slot.

						-Matt