Index: if_re.c
===================================================================
RCS file: /home/dcvs/src/sys/dev/netif/re/if_re.c,v
retrieving revision 1.28
diff -u -r1.28 if_re.c
--- if_re.c	14 Nov 2006 13:35:49 -0000	1.28
+++ if_re.c	18 Dec 2006 15:41:42 -0000
@@ -161,7 +161,7 @@
 /*
  * Various supported device vendors/types and their names.
  */
-static struct re_type re_devs[] = {
+static const struct re_type re_devs[] = {
 	{ PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T, RE_HWREV_8169S,
 		"D-Link DGE-528(T) Gigabit Ethernet Adapter" },
 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, RE_HWREV_8139CPLUS,
@@ -191,18 +191,18 @@
 	{ 0, 0, 0, NULL }
 };
 
-static struct re_hwrev re_hwrevs[] = {
-	{ RE_HWREV_8139CPLUS, RE_8139CPLUS, "C+"},
-	{ RE_HWREV_8168_SPIN1, RE_8169, "8168"},
-	{ RE_HWREV_8169, RE_8169, "8169"},
-	{ RE_HWREV_8169S, RE_8169, "8169S"},
-	{ RE_HWREV_8110S, RE_8169, "8110S"},
-	{ RE_HWREV_8169_8110SB, RE_8169, "8169SB"},
-	{ RE_HWREV_8169_8110SC, RE_8169, "8169SC"},
-	{ RE_HWREV_8100E, RE_8169, "8100E"},
-	{ RE_HWREV_8101E, RE_8169, "8101E"},
-	{ RE_HWREV_8168_SPIN2, RE_8169, "8168"},
-	{ 0, 0, NULL }
+static const struct re_hwrev re_hwrevs[] = {
+	{ RE_HWREV_8139CPLUS,	RE_8139CPLUS,	RE_F_HASMPC,	"C+" },
+	{ RE_HWREV_8168_SPIN1,	RE_8169,	0,		"8168" },
+	{ RE_HWREV_8168_SPIN2,	RE_8169,	0,		"8168" },
+	{ RE_HWREV_8169,	RE_8169,	RE_F_HASMPC,	"8169" },
+	{ RE_HWREV_8169S,	RE_8169,	RE_F_HASMPC,	"8169S" },
+	{ RE_HWREV_8110S,	RE_8169,	RE_F_HASMPC,	"8110S" },
+	{ RE_HWREV_8169_8110SB,	RE_8169,	RE_F_HASMPC,	"8169SB" },
+	{ RE_HWREV_8169_8110SC,	RE_8169,	0,		"8169SC" },
+	{ RE_HWREV_8100E,	RE_8169,	RE_F_HASMPC,	"8100E" },
+	{ RE_HWREV_8101E,	RE_8169,	0,		"8101E" },
+	{ 0, 0, 0, NULL }
 };
 
 static int	re_probe(device_t);
@@ -780,7 +780,7 @@
 static int
 re_probe(device_t dev)
 {
-	struct re_type *t;
+	const struct re_type *t;
 	struct re_softc *sc;
 	int rid;
 	uint32_t hwrev;
@@ -1051,11 +1051,11 @@
 {
 	struct re_softc	*sc = device_get_softc(dev);
 	struct ifnet *ifp;
-	struct re_hwrev *hw_rev;
+	const struct re_hwrev *hw_rev;
 	uint8_t eaddr[ETHER_ADDR_LEN];
 	uint16_t as[ETHER_ADDR_LEN / 2];
-	int hwrev;
 	uint16_t re_did = 0;
+	uint32_t hwrev;
 	int error = 0, rid, i;
 
 	callout_init(&sc->re_timer);
@@ -1142,6 +1142,7 @@
 	for (hw_rev = re_hwrevs; hw_rev->re_desc != NULL; hw_rev++) {
 		if (hw_rev->re_rev == hwrev) {
 			sc->re_type = hw_rev->re_type;
+			sc->re_flags = hw_rev->re_flags;
 			break;
 		}
 	}
@@ -1367,13 +1368,13 @@
 	} else
 		m->m_data = m->m_ext.ext_buf;
 
+	m->m_len = m->m_pkthdr.len = MCLBYTES;
+
 	/*
-	 * Initialize mbuf length fields and fixup
-	 * alignment so that the frame payload is
-	 * longword aligned.
+	 * NOTE:
+	 * Some re(4) chips(e.g. RTL8101E) need address of the receive buffer
+	 * to be 8-byte aligned, so don't call m_adj(m, ETHER_ALIGN) here.
 	 */
-	m->m_len = m->m_pkthdr.len = MCLBYTES;
-	m_adj(m, ETHER_ALIGN);
 
 	arg.sc = sc;
 	arg.re_idx = idx;
@@ -2063,8 +2064,8 @@
 	CSR_WRITE_1(sc, RE_EECMD, RE_EEMODE_WRITECFG);
 	CSR_WRITE_4(sc, RE_IDR0,
 	    htole32(*(uint32_t *)(&sc->arpcom.ac_enaddr[0])));
-	CSR_WRITE_4(sc, RE_IDR4,
-	    htole32(*(uint32_t *)(&sc->arpcom.ac_enaddr[4])));
+	CSR_WRITE_2(sc, RE_IDR4,
+	    htole16(*(uint16_t *)(&sc->arpcom.ac_enaddr[4])));
 	CSR_WRITE_1(sc, RE_EECMD, RE_EEMODE_OFF);
 
 	/*
@@ -2073,10 +2074,12 @@
 	re_rx_list_init(sc);
 	re_tx_list_init(sc);
 
+#ifdef notdef
 	/*
 	 * Enable transmit and receive.
 	 */
 	CSR_WRITE_1(sc, RE_COMMAND, RE_CMD_TX_ENB|RE_CMD_RX_ENB);
+#endif
 
 	/*
 	 * Set the initial TX and RX configuration.
@@ -2142,7 +2145,8 @@
 	sc->re_txthresh = RE_TX_THRESH_INIT;
 
 	/* Start RX/TX process. */
-	CSR_WRITE_4(sc, RE_MISSEDPKT, 0);
+	if (sc->re_flags & RE_F_HASMPC)
+		CSR_WRITE_4(sc, RE_MISSEDPKT, 0);
 #ifdef notdef
 	/* Enable receiver and transmitter. */
 	CSR_WRITE_1(sc, RE_COMMAND, RE_CMD_TX_ENB|RE_CMD_RX_ENB);
@@ -2195,6 +2199,11 @@
 	ifp->if_flags |= IFF_RUNNING;
 	ifp->if_flags &= ~IFF_OACTIVE;
 
+	/*
+	 * Enable transmit and receive.
+	 */
+	CSR_WRITE_1(sc, RE_COMMAND, RE_CMD_TX_ENB|RE_CMD_RX_ENB);
+
 	sc->re_link = 0;
 	callout_reset(&sc->re_timer, hz, re_tick, sc);
 }
@@ -2446,7 +2455,8 @@
 	else
 		RE_DISABLE_TX_MODERATION(sc);
 
-	re_init(sc);
+	if ((ifp->if_flags & (IFF_RUNNING | IFF_UP)) == (IFF_RUNNING | IFF_UP))
+		re_init(sc);
 back:
 	lwkt_serialize_exit(ifp->if_serializer);
 	return error;
Index: if_revar.h
===================================================================
RCS file: /home/dcvs/src/sys/dev/netif/re/if_revar.h,v
retrieving revision 1.1
diff -u -r1.1 if_revar.h
--- if_revar.h	14 Nov 2006 13:35:49 -0000	1.1
+++ if_revar.h	18 Dec 2006 15:40:26 -0000
@@ -67,16 +67,14 @@
 
 struct re_hwrev {
 	uint32_t		re_rev;
-	int			re_type;
+	int			re_type;	/* RE_{8139CPLUS,8169} */
+	uint32_t		re_flags;	/* see RE_F_ */
 	const char		*re_desc;
 };
 
 #define RE_8139CPLUS		3
 #define RE_8169			4
 
-#define RE_ISCPLUS(x)		((x)->re_type == RE_8139CPLUS ||	\
-				 (x)->re_type == RE_8169)
-
 struct re_softc;
 
 struct re_dmaload_arg {
@@ -133,7 +131,7 @@
 	struct callout		re_timer;
 	struct mbuf		*re_head;
 	struct mbuf		*re_tail;
-	uint32_t		re_hwrev;
+	uint32_t		re_flags;	/* see RE_F_ */
 	uint32_t		re_rxlenmask;
 	int			re_txstart;
 	int			re_testmode;
@@ -158,6 +156,8 @@
 #endif
 };
 
+#define RE_F_HASMPC		0x1
+
 #define RE_TX_MODERATION_IS_ENABLED(sc)			\
 	((sc)->re_tx_ack == RE_ISR_TIMEOUT_EXPIRED)