Re: New Release

[Matthew Dillon <dillon@xxxxxxxxxxxxxxxxxxxx>]

:As a stupid user I wonder what it takes generally to support the AMD 64 
:bit extension, what are the typical issues in supporting both 32 and 64 
:bit code? Links would be very welcome too :-)
:
:-- 
:mph

    Basically all the registers become 64 bits.  Pointers become 64 bits.  8 new
    registers are added (For 16 total rather then 8 total), and the MMU works 
    differently.  The kernel would run in 64 bit mode.  Userland could run in
    32 or 64 bit mode (on a per-process basis).

    All traditional kernel structures will change size, which is partially being
    addressed by the libc major version bump work Joerg has mentioned, but also
    pointers passed between userland and the kernel change size and that's more of
    an issue.  My intention is to use the user syscall compatibility layer
    that I've mentioned before to normalize pointer arguments so the kernel only
    has to deal with a single API for both 32 and 64 bit modes.
 
					-Matt
					Matthew Dillon 
					<dillon@xxxxxxxxxxxxx>