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[GSOC] Implement hardware nested page table support for vkernels


From: Mihai Carabas <mihai.carabas@xxxxxxxxx>
Date: Fri, 7 Jun 2013 12:07:49 +0300

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Hello everyone!

My name is Mihai Carabas and this summer I will be working on
developing harware nested page table support for vkernels.. The goal of the
project is to do thepagetable walking for a guest into the harware, too. My
mentor on this project will be Venkatesh Srinivas.

First of all, I will have develop a mechanism for detecting the support for
extended/nested page table through the "cpuid" command.

In the next step, I will make a simple hardware page table walking, to see
how the mechanism work. Probably it will include stub functions for
VMSPACES implementation to releave the design I thought at.

In the end I will be integrating the hardware page table walking into the
VMSPACE API and start testing.

As a final outcome, I should have a functional vkernel with hardware page
table walking on one platform (the most likely Intel) and some analisys
regarding the gain of perfomance obtain through this new feature.

You can see my detailed proposal here [1].

Thanks,
Mihai

[1]
http://www.google-melange.com/gsoc/proposal/review/google/gsoc2013/mihaicarabas/14001

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<div dir=3D"ltr">Hello everyone!<br><br>My name is Mihai Carabas and this s=
ummer I will be working on <br>developing harware nested page table support=
 for vkernels.. The goal of the project is to do thepagetable walking for a=
 guest into the harware, too. My mentor on this project will be Venkatesh S=
rinivas.<br>
<br>First of all, I will have develop a mechanism for detecting the support=
 for extended/nested page table through the &quot;cpuid&quot; command.<br><=
br>In the next step, I will make a simple hardware page table walking, to s=
ee how the mechanism work. Probably it will include stub functions for VMSP=
ACES implementation to releave the design I thought at.<br>
<br>In the end I will be integrating the hardware page table walking into t=
he VMSPACE API and start testing.<br><br>As a final outcome, I should have =
a functional vkernel with hardware page table walking on one platform (the =
most likely Intel) and some analisys regarding the gain of perfomance obtai=
n through this new feature.<br>
<br>You can see my detailed proposal here [1].<br><br>Thanks,<br>Mihai<br><=
br>[1] <a href=3D"http://www.google-melange.com/gsoc/proposal/review/google=
/gsoc2013/mihaicarabas/14001">http://www.google-melange.com/gsoc/proposal/r=
eview/google/gsoc2013/mihaicarabas/14001</a><br>
</div>

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