DragonFly On-Line Manual Pages


IX(4)		      DragonFly Kernel Interfaces Manual		 IX(4)

NAME

ix -- Intel(R) 10Gb Ethernet driver

SYNOPSIS

To compile this driver into the kernel, place the following line in your kernel configuration file: device ix Alternatively, to load the driver as a module at boot time, place the following line in loader.conf(5): if_ix_load="YES"

DESCRIPTION

The ix driver provides support for PCI Express 10Gb Ethernet adapters based on the Intel 82598, 82599, and X540 Ethernet controller chips. The ix driver supports: Transmit/Receive checksum offload for IP/UDP/TCP. Interrupt moderation TCP segmentation offload (TSO) Receive side scaling (RSS) Multiple tranmission queues Multiple vector MSI-X VLAN tag stripping and inserting If polling(4) or MSI-X is used, by default, the ix driver will try enabling as many reception queues and transmission queues as are allowed by the number of CPUs in the system. If multiple transmission queues are used, the round-robin arbitration is performed among the transmission queues. And if both TSO and multiple tranmission queues are used, the round-robin arbitration between trans- mission queues is done at the TCP segment boundary after the hardware segmentation is performed. 82598 supports 16 reception queues and 32 transmission queues. MSI-X is not enabled due to hardware errata. Under MSI or legacy interrupt mode, 2 reception queues are enabled for hardware RSS hash and only 1 transmis- sion queue is enable. 82599 and X540 supports 16 reception queues and 64 transmission queues. MSI-X is enable by default. However, due to the number of MSI-X vectors is 64, at most 16 reception queues and 32 transmission queues will be enabled under MSI-X mode. For more information on configuring this device, see ifconfig(8). The ix driver supports polling(4).

HARDWARE

The ix driver supports Gigabit Ethernet adapters based on the Intel 82598, 82599, and X540 controller chips: * Intel 10 Gigabit AF DA Dual Port Server Adapter * Intel 10 Gigabit AT Server Adapter * Intel 10 Gigabit AT2 Server Adapter * Intel 10 Gigabit CX4 Dual Port Server Adapter * Intel 10 Gigabit XF LR Server Adapter * Intel 10 Gigabit XF SR Dual Port Server Adapter * Intel 10 Gigabit XF SR Server Adapter * Intel 82598 10 Gigabit Ethernet Controller * Intel 82599 10 Gigabit Ethernet Controller * Intel Ethernet Controller X540-AT2 * Intel Ethernet Converged Network Adapter X520 Series * Intel Ethernet Converged Network Adapter X540-T1 * Intel Ethernet Converged Network Adapter X540-T2 * Intel Ethernet Server Adapter X520 Series * Intel Ethernet Server Adapter X520-DA2 * Intel Ethernet Server Adapter X520-LR1 * Intel Ethernet Server Adapter X520-SR1 * Intel Ethernet Server Adapter X520-SR2 * Intel Ethernet Server Adapter X520-T2

TUNABLES

Tunables can be set at the loader(8) prompt before booting the kernel or stored in loader.conf(5). X is the device unit number. hw.ix.rxd hw.ixX.rxd Number of receive descriptors allocated by the driver. The default value is 2048. The minimum is 64, and the maximum is 4096. hw.ix.txd hw.ixX.txd Number of transmit descriptors allocated by the driver. The default value is 2048. The minimum is 64, and the maximum is 4096. hw.ix.rxr hw.ixX.rxr This tunable specifies the number of reception queues could be enabled. Maximum allowed value for these tunables is device specific and it must be power of 2 aligned. Setting these tunables to 0 allows the driver to make as many reception queues ready-for-use as allowed by the number of CPUs. hw.ix.txr hw.ixX.txr This tunable specifies the number of transmission queues could be enabled. Maximum allowed value for these tunables is device specific and it must be power of 2 aligned. Setting these tunables to 0 allows the driver to make as many transmission queues ready-for-use as allowed by the number of CPUs. hw.ix.msix.enable hw.ixX.msix.enable By default, the driver will use MSI-X if it is supported. This behaviour can be turned off by setting this tunable to 0. hw.ix.msix.agg_rxtx hw.ixX.msix.agg_rxtx If MSI-X is used, the driver aggregates transmis- sion queue and reception queue processing by default. This behaviour could be turned off by setting this tunable to 0. If the number of MSI- X vectors is not enough to put transmission queue processing and reception queue processing onto independent MSI-X vector, then transmission queue and reception queue processing are always aggre- gated. hw.ixX.msix.off If MSI-X is used, and transmission queue and reception queue processing are aggregated, this tunable specifies the leading target CPU for transmission and reception queues processing. The value specificed must be aligned to the maxi- mum of the number of reception queues and the number of transmission queues enabled, and must be less than the power of 2 number of CPUs. hw.ixX.msix.rxoff If MSI-X is used, and transmission queue and reception queue processing are not aggregated, this tunable specifies the leading target CPU for reception queues processing. The value speci- ficed must be aligned to the number of reception queues enabled and must be less than the power of 2 number of CPUs. hw.ixX.msix.txoff If MSI-X is used, and transmission queue and reception queue processing are not aggregated, this tunable specifies the leading target CPU for transmission queues processing. The value speci- ficed must be aligned to the number of transmis- sion queues enabled and must be less than the power of 2 number of CPUs. hw.ix.msi.enable hw.ixX.msi.enable If MSI-X is disabled and MSI is supported, the driver will use MSI. This behavior can be turned off by setting this tunable to 0. hw.ixX.msi.cpu If MSI is used, it specifies the MSI's target CPU. hw.ixX.npoll.txoff This tunable specifies the leading target CPU for transmission queue polling(4) processing. The value specificed must be aligned to the number of transmission queues enabled and must be less than the power of 2 number of CPUs. hw.ixX.npoll.rxoff This tunable specifies the leading target CPU for reception queue polling(4) processing. The value specificed must be aligned to the number of reception queues enabled and must be less than the power of 2 number of CPUs. hw.ix.unsupported_sfp By default, this driver does not allow "unsup- ported" SFP modules. This behavior can be changed by setting this tunable to 1. MIB Variables A number of per-interface variables are implemented in the dev.ix.X branch of the sysctl(3) MIB. rxr Number of reception queues could be enabled (read-only). Use the tunable hw.ix.rxr or hw.ixX.rxr to configure it. rxr_inuse Number of reception queues being used (read-only). txr Number of transmission queues could be enabled (read- only). Use the tunable hw.ix.txr or hw.ixX.txr to con- figure it. txr_inuse Number of transmission queues being used (read-only). rxd Number of descriptors per reception queue (read-only). Use the tunable hw.ix.rxd or hw.ixX.rxd to configure it. txd Number of descriptors per transmission queue (read-only). Use the tunable hw.ix.txd or hw.ixX.txd to configure it. rxtx_intr_rate If MSI or legacy interrupt is used, this sysctl controls the highest possible frequency that interrupt could be generated by the device. If MSI-X is used, this sysctl controls the highest possible frequency that interrupt could be generated by the MSI-X vectors, which aggregate transmission queue and reception queue procecssing. It is 8000 by default (125us). rx_intr_rate If MSI-X is used, this sysctl controls the highest possi- ble frequency that interrupt could be generated by the MSI-X vectors, which only process reception queue. It is 8000 by default (125us). tx_intr_rate If MSI-X is used, this sysctl controls the highest possi- ble frequency that interrupt could be generated by the MSI-X vectors, which only process transmission queue. It is 6000 by default (~150us). sts_intr_rate If MSI-X is used, this sysctl controls the highest possi- ble frequency that interrupt could be generated by the MSI-X vectors, which only process chip status changes. It is 8000 by default (125us). tx_intr_nsegs Transmission interrupt is asked to be generated upon every tx_intr_nsegs transmission descritors having been setup. The default value is 1/16 of the number of trans- mission descriptors per queue. tx_wreg_nsegs The number of transmission descriptors should be setup before the hardware register is written. Setting this value too high will have negative effect on transmission timeliness. Setting this value too low will hurt overall transmission performance due to the frequent hardware register writing. The default value is 8. rx_wreg_nsegs The number of reception descriptors should be setup before the hardware register is written. Setting this value too high will make device drop incoming packets. Setting this value too low will hurt overall reception performance due to the frequent hardware register writ- ing. The default value is 32. npoll_rxoff See the tunable hw.ixX.npoll.rxoff. The set value will take effect the next time polling(4) is enabled on the device. npoll_txoff See the tunable hw.ixX.npoll.txoff. The set value will take effect the next time polling(4) is enabled on the device. flowctrl Flow control setting. Set it to 0 to turn off flow con- trol. Set it to 1 to enable only the reception of pause frames. Set it to 2 to enable only the generation of pause frames. Set it to 3 to enable both the reception of pause frames and generation of pause frames, i.e. full flow control.

SEE ALSO

altq(4), arp(4), ifmedia(4), netintro(4), ng_ether(4), polling(4), vlan(4), ifconfig(8)

HISTORY

The ix device driver first appeared in DragonFly 3.1.

AUTHORS

The ix driver was written by Intel Corporation <freebsdnic@mailbox.intel.com>. DragonFly 4.1 November 28, 2014 DragonFly 4.1